Multi-phase clock generators are commonly used in high-speed signaling systems to generate clock signals that are phase-aligned with points of interest in an incoming signal. For example, in a clock-data recovery system, one or more clock signals are typically aligned with the midpoints of data eyes and used to control a data sampling instant, while one or more other clock signals are aligned with edges of data eyes and used to recover timing information. Clock generators typically include a reference loop for generating a set of phase-distributed reference clock signals, referred to herein as phase vectors, and one or more clock interpolators for interpolating between selected phase vectors to generate output clock signals having an arbitrary phase.
In many signaling applications, the frequency of the phase vectors and output clock signals is fixed at a nominal operating frequency so that the reference loop and clock interpolators may be constructed with appropriate circuit elements and bias points particularly suited to the nominal operating frequency. As signaling rates progress further into the gigahertz range, however, signaling applications increasingly call for high speed devices that provide legacy support for lower signaling rates, with upper- and lower-end signaling rates sometimes differing by a factor of 10 or more. Traditionally, such wide-range operation has been achieved by adjusting the control voltage provided to a voltage-controlled oscillator within the reference loop, thereby adjusting the frequency of the phase vectors supplied to the clock interpolators and therefore the frequency of the output clock signals. Unfortunately, voltage-controlled oscillators designed to accommodate wide frequency ranges tend to include high-gain amplifiers that exhibit relatively high noise susceptibility and therefore increase jitter in the output clock signals. Also, time-consuming frequency re-locking is often required within the voltage-controlled oscillator when changing from one operating frequency to another.